military and commercial temperature ranges idt54/74fct374/a/c fast cmos octal d registers (3-state) 1 june 2002 military and commercial temperature ranges the idt logo is a registered trademark of integrated device technology, inc. ? 2002 integrated device technology, inc. dsc-5423/2 features: ? idt54fct374 equal to fast? speed and drive ? idt54/74fct374a up to 30% faster than fast ? idt74fct374c up to 50% faster than fast ?i ol = 48ma (commercial) and 32ma (military) ? cmos power levels (1mw typ. static) ? edge-triggered master/slave, d-type flip-flops ? buffered common clock and buffered common 3-state control ? military product compliant to mil-std-883, class b ? meets or exceeds jedec standard 18 specifications ? available in the following packages: ? commercial: soic ? military: cerdip, lcc functional block diagram idt54/74fct374/a/c fast cmos octal d registers (3-state) description: the fct374 is an 8-bit register built using an advanced dual metal cmos technology. these registers consist of eight d-type flip-flops with a buffered common clock and buffered 3-state output control. when the output enable ( oe ) is low, the eight outputs are enabled. when the oe input is high, the outputs are in the high-impedance state. input data meeting the set-up and hold time requirements of the d inputs is transferred to the o outputs on the low-to-high transition of the clock input. the fct374 has non-inverting outputs with respect to the data at the d inputs. cp o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 oe d q cp d q d q d q d q d q d q d q cp cp cp cp cp cp cp d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7
military and commercial temperature ranges 2 idt54/74fct374/a/c fast cmos octal d registers (3-state) pin configuration cerdip/ soic top view lcc top view symbol rating commercial military unit v term (2) terminal voltage ?0.5 to +7 ?0.5 to +7 v with respect to gnd v term (3) terminal voltage ?0.5 to v cc ?0.5 to v cc v with respect to gnd t a operating temperature 0 to +70 ?55 to +125 c t bias temperature under bias ?55 to +125 ?65 to +135 c t stg storage temperature ?55 to +125 ?65 to +150 c p t power dissipation 0.5 0.5 w i out dc output current 120 120 ma absolute maximum ratings (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. no terminal voltage may exceed vcc by +0.5v unless otherwise noted. 2. input and vcc terminals only. 3. output and i/o terminals only. symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 6 10 pf c out output capacitance v out = 0v 8 12 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. 1 2 3 4 5 7 9 6 8 10 11 12 13 14 15 16 17 18 19 20 o 6 d 7 d 6 o 5 d 5 o e d 0 o 0 v c c o 7 o 3 g n d c p o 4 d 4 index d 1 o 1 d 3 o 2 d 2 2 3 1 16 15 14 11 19 18 20 17 13 12 5 6 7 4 8 9 10 d 1 o 0 d 0 v cc o 1 d 3 o 2 d 2 o 3 gnd o 7 o 6 d 7 d 6 o 5 o 4 d 5 d 4 cp oe note: 1. h = high voltage level x = don?t care l = low voltage level z = high impedance nc = no change = low-to-high transition function table (1) inputs outputs internal function oe cp dx qx q x high-z h l x z n c hhxznc load l llh register l hh l h lzh h hzl pin names description dx d flip-flop data inputs c p clock pulse for the register. enters data on low-to- high transition. o x 3-state outputs (true) o x 3-state outputs (inverted) oe active low 3-state output enable input pin description
military and commercial temperature ranges idt54/74fct374/a/c fast cmos octal d registers (3-state) 3 symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2 ? ? v v il input low level guaranteed logic low level ? ? 0.8 v i ih input high current v i = v cc ?? 5 v cc = max. v i = 2.7v ? ? 5 (4) a i il input low current v i = 0.5v ? ? ?5 (4) v i = gnd ? ? ?5 i ozh v o = v cc ?? 10 off state (high impedance) v cc = max. v o = 2.7v ? ? 10 (4) a i ozl output current v o = 0.5v ? ? ?10 (4) v o = gnd ? ? ?10 v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i os short circuit current v cc = max., v o = gnd (3) ?60 ?120 ? ma v oh output high voltage v cc = 3v, v in = v lc or v hc , i oh = ?32 av hc v cc ? v cc = min i oh = ?300 av hc v cc ?v v in = v ih or v il i oh = ?12ma mil 2.4 4.3 ? i oh = ?15ma com'l 2.4 4.3 ? v ol output low voltage v cc = 3v, v in = v lc or v hc , i ol = 300 a ? gnd v lc v cc = min i ol = 300 a ? gnd v lc (4) v v in = v ih or v il i ol = 32ma mil ? 0.3 0.5 i ol = 48ma com'l ? 0.3 0.5 dc electrical characteristics over operating range following conditions apply unless otherwise specified: v lc = 0.2v; v hc = v cc - 0.2v commercial: t a = 0c to +70c, v cc = 5.0v 5%, military: t a = -55c to +125c, v cc = 5.0v 10% notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be tested at one time. duration of the test should not exceed one second. 4. this parameter is guaranteed but not ttested.
military and commercial temperature ranges 4 idt54/74fct374/a/c fast cmos octal d registers (3-state) notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of ? i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + ? i cc d h n t + i ccd (f cp /2 + fini) i cc = quiescent current ? i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) fi = input frequency ni = number of inputs at fi all currents are in milliamps and all frequencies are in megahertz. power supply characteristics v lc = 0.2v; v hc = v cc - 0.2v symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power supply current v cc = max. ? 0.2 1.5 ma v in v hc ; v in v lc ? i cc quiescent power supply current v cc = max. ? 0.5 2 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply v cc = max. v in v hc ? 0.15 0.25 ma/ current (4) outputs open v in v lc mhz oe = gnd one input toggling 50% duty cycle i c total power supply current (6) v cc = max. v in v hc ? 1.7 4 ma outputs open v in v lc f cp = 10mhz (fct) 50% duty cycle v in = 3.4v ? 2.2 6 oe = gnd v in = gnd fi = 5mhz one bit toggling v cc = max. v in v hc ? 4 7.8 (5) outputs open v in v lc f cp = 10mhz (fct) 50% duty cycle v in = 3.4v ? 6.2 16.8 (5) oe = gnd v in = gnd fi = 2.5mhz eight bits toggling
military and commercial temperature ranges idt54/74fct374/a/c fast cmos octal d registers (3-state) 5 notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not tested. 74fct374a 74fct374c symbol parameter condition (1) min. (2) max. min. (2) max. unit t plh propagation delay c l = 50pf 2 6.5 2 5.2 ns t phl cp to qx r l = 500 ? t pzh output enable time 1.5 6.5 1.5 5.5 ns t pzl t phz output disable time 1.5 5.5 1.5 5 ns t plz t su set-up time high or low 2 ? 2 ? ns dx to cp t h hold time high or low 1.5 ? 1.5 ? ns dx to cp t w cp pulse width high or low (3) 5?5?ns switching characteristics over operating range - industrial 54fct374 54fct374a symbol parameter condition (1) min. (2) max. min. (2) max. unit t plh propagation delay c l = 50pf 2 11 2 7.2 ns t phl cp to qx r l = 500 ? t pzh output enable time 1.5 14 1.5 7.5 ns t pzl t phz output disable time 1.5 8 1.5 6.5 ns t plz t su set-up time high or low 2 ? 2 ? ns dx to cp t h hold time high or low 1.5 ? 1.5 ? ns dx to cp t w cp pulse width high or low (3) 7?6?ns switching characteristics over operating range - military
military and commercial temperature ranges 6 idt54/74fct374/a/c fast cmos octal d registers (3-state) pulse generator r t d.u.t . v cc v in c l v out 50pf 500 ? 500 ? 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. octal link octal link octal link octal link octal link test circuits and waveforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; z o 50 ? ; t f 2.5ns; t r 2.5ns. test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator.
military and commercial temperature ranges idt54/74fct374/a/c fast cmos octal d registers (3-state) 7 ordering information corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com idt xx temp. range xxxx device type xx package x process so commercial options small outline ic fast cmos octal d register (3-state) 54 74 ? 55 c to +125 c ? 0 c to +70 c d l military options cerdip leadless chip carrier blank b commercial mil-std-883, class b fct 374 374a 374c
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